Guiding Sensor Nodes over 2.5D Terrain

• Simulated a distributed metaheuristic search algorithm to optimize sensor node deployment in 2.5D terrains.
• Showed 50% improvement in run time of an existing algorithm using custom simulator.

A Brief History of Homomorphic Encryption Schemes

• Compared and analyzed the runtime and efficiency of various implementations of different classes of Homomorphic Encryption schemes.

IMPLEMENTATION OF SPANNING TREE PROTOCOL

• Implemented the Spanning Tree Protocol in the ns3 simulator as a layer 3 routing protocol.
• Successfully shown proof of concept in that there are no forwarding loops and cycles in different test topologies when used to route paths.
• The network graph converges into a spanning tree through a distributed algorithm implemented on each node.

Branch predictor

• Created a branch predictor using various concepts from two different state of the art branch predictors.
• Succefully combined perceptron based and TAGE based branch prediction algorithms.
• The hybrid predictor showed better prediction accuracy on 20% of the evaluation traces.

Design and Layout of 32 bit SRAM Using Cadence Virtuoso

• Designed an SRAM core along with all the peripheral circuitry for read and write operations.
• Configured the design to optimize noise margin. Implemented it on Cadence Virtuoso and succesfully performed DRC and LVS checks.

Implementation of HDMI on FPGA

• This project gives the methodology of implementing Transition Minimized Differential Signaling on Field Programmable Gate Array to interface HDMI.
• This includes developing the architecture of HDMI transmitter, the design of encoder, high speed serializer, through the efficient use of FPGA resources.
• Configured the design to use least number of gates to decrease power consumption.
• Tested our design on Atlys Spartan 6 FPGA board by displaying a high resolution controlled text.