EXPERIENCE:
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6/05-PRESENT
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Software Engineer
Intel Corporation, Santa Clara Design Technology and Solutions Group
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Implemented features within an Automatic Test Pattern Generation
(ATPG) tool for microprocessors and chips sets.
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Determined and clarified design team requirements prior to writing
specifications for feature development.
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Maintained GNU autotools based build and specialized regression
environments.
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Ported and validated C++ code through numerous compiler and platform
changes.
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Projects included interactive debug, enhanced ATPG learning, and
Design for Test (DFT) validation features through a programming
interface.
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4/00-6/05
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CAD Engineer
Intel Corporation, Santa Clara Design Technology and Solutions Group
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Worked with a very small team to enable Defect Based Test.
Responsibilities included:
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Productized fault extraction, fault mapping, and fault sampling
for several fabrication defect models.
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Pioneered ATPG execution for several defect models and delivered
those test patterns for production testing.
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Developed and refined innovative methodologies to increase
coverage metrics through controlled experiments.
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Evaluated microprocessor test patterns to identify test holes and
help improve product yield. Responsibilities included:
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Collected test pattern effectiveness through fault simulation on
initial and subsequent patterns used to fill test holes.
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Reported test patterm effectiveness to determine locations of test
holes and track progress of subsequent tests.
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7/99-9/99;
6/98-9/98
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Graduate Intern Technical
Intel Corporation, Santa Clara Design Technology Group
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Implemented a tool from scratch in C++ that transforms data from a
variety of VLSI layout formats. Used layouts from microprocessor
functional blocks. Extracted data was passed to an Inductive Fault
Analysis (IFA) tool.
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Developed capabilities that extracted layout information, connected
polygons, and propagated electrical net name information within and
across metal layers.
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Validated results and compared run times from industry standard
tools.
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10/96-7/99
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Student Programmer
Computer Engineering Department, University of California, Santa Cruz
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Worked with a small group on an Inductive Fault Analysis (IFA) tool
written in C to identify possible defect locations in VLSI CMOS
circuits.
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Developed and released new features for the IFA tool.
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Resolved bugs and answered questions from customers.
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6/96-9/96
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Information Technologies Student Intern
Modesto Irrigation District, IT Department
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Designed and implemented the District's web page.
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Installed network clients and network client applications.
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Installed and upgraded new hardware and resolved software problems.
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